Hardware Security Evaluation Engineer - European Space Agency (Redu)
About this position
The summary below is published by European Space Agency on the official vacancy notice. Our own analysis — salary realism, comparable openings, career trajectory, language profile — follows further down the page.
Job Requisition ID:21080
Date Posted:27 October 2026
Closing Date:17 November 2026 23:59 CET/CEST
Publication Method:External Only
Directorate:Technology, Engineering and Quality
This is a non-renewable post for a limited duration of 4 years and open for the specific needs of a National Project.Accordingly, the external candidate selected for this post will continue to be considered an external candidate for the purposes of any future applications to the Agency.
Location ESEC, Redu, Belgium
Description
Hardware Security Evaluation Engineer in the System Security Section (TEC-SES), End-to-End Systems Division, Systems Department, Directorate of Technology, Engineering and Quality.
The System Security Section is responsible for end-to-end system security engineering for the Agency’s missions, projects and activities across space, ground and user segments and communication links, at system, subsystem, element and equipment levels. Its responsibilities span the mission lifecycle from the study phase and definition of requirements to design, development, security integration and verification, and security service preparation, across the full stack, from the physical to the…
Excerpt shown; read the full notice on the official page. The structured breakdown below covers the key facts.
Key responsibilities
According to the vacancy notice, the role centres on the following duties:
- Support the Project Manager by providing recommendations, guidance and plans for test and evaluation laboratory capability development and technologies for hardware security evaluation
- Provide regular reporting to the Project Manager on the status of duties assigned under the project
- Engage directly with and advise national customers and ESA experts on options for developing and maturing hardware security evaluation capabilities
- Derive technical requirements and review, assess and evaluate project proposals, including security design, development, implementation, qualification and validation
- Foster new security application areas for multidisciplinary activities, placing emphasis on innovative concepts, cutting-edge technologies and system architectures in hardware security evaluation
- Support laboratory activities as required
- Continuously follow technological and scientific developments relevant to the position, particularly emerging threats, exploits and industry trends
- Contribute to other technical activities beyond the main project within area of expertise as requested
Are you eligible?
Check these requirements from the notice before investing time in an application:
- Education: Master's degree in a relevant field, or bachelor's degree with additional four years of relevant professional experience
- Experience: In principle, three years of relevant professional experience (or four years if bachelor's degree holder)
- Key skills: Hardware attacks and fault injection, Side-channel analysis and physical security testing, Embedded systems and hardware security architecture, Cryptographic hardware security, Hardware security evaluation and certification standards, Hardware evaluation laboratory technologies and technical analysis, Side channel attacks, Voltage fault injection, Clock fault injection, Electromagnetic fault injection
Contract and working arrangements
Contract duration: 4 years, non-renewable.
Working arrangements: ESEC, Redu, Belgium.
Hiring unit: System Security Section (TEC-SES), End-to-End Systems Division, Systems Department, Directorate of Technology, Engineer….
Position details
- Reference
- 1451832933
- Last Verified
- 27 October 2026
Position overview
This is the official EU Careers listing for Hardware Security Evaluation Engineer at ESA based in Redu (Other). The vacancy reference is 1451832933.
Job Requisition ID:21080
Date Posted:27 October 2026
Closing Date:17 November 2026 23:59 CET/CEST
Publication Method:External Only
Directorate:Technology, Engineering and Quality
This is a non-renewable post for a limited duration of 4 years and open for the specific needs of a National Project.Accordingly, the external candidate selected for this post will continue to be considered an external candidate for the purposes of any future applications to the Agency.
Location ESEC, Redu, Belgium
Description
Hardware Security Evaluation Engineer in the System Security Section (TEC-SES), End-to-End Systems Division, Systems Department, Directorate of Technology, Engineering and Quality.
The System Security Section is responsible for end-to-end system security engineering for the Agency’s missions, projects and activities across space, ground and user segments and communication links, at system, subsystem, element and equipment levels. Its responsibilities span the mission lifecycle from the study phase and definition of requirements to design, development, security integration and verification, and security service preparation, across the full stack, from the physical to the application layer.
To fulfil these functions, the System Security Section defines and conducts the associated research and development (R&D) activities and studies and implements the necessary security engineering standards.
Using its security laboratory facilities, the System Security Section performs vulnerability assessments across all areas within its remit and proposes detection methods and mitigation and protection measures using security assessment tools and equipment.
This position will support a third-party activity aimed at developing a national hardware security evaluation capability.
Duties
Your tasks and responsibilities will include:
- supporting the Project Manager by providing recommendations, guidance and plans for test and evaluation laboratory capability development and technologies for hardware security evaluation; - regular reporting to the Project Manager on the status of the duties assigned under the project; - engaging directly with and advising national customers and ESA experts on options for developing and maturing hardware security evaluation capabilities; - deriving technical requirements and reviewing, assessing and evaluating project proposals, including the security design, development, implementation, qualification and validation; - fostering new security application areas for multidisciplinary activities, placing emphasis on innovative concepts, cutting-edge technologies and system architectures in the field of hardware security evaluation; - supporting laboratory activities as required; - continuously following technological and scientific developments relevant to the position, particularly emerging threats, exploits and industry trends; - contributing, as requested, to other technical activities beyond the main project within your area of expertise.
Technical competencies
Hardware attacks and fault injection
Side-channel analysis and physical security testing
Embedded systems and hardware security architecture
Cryptographic hardware security
Hardware security evaluation and certification standards
Hardware evaluation laboratory technologies and technical analysis
Behavioural competencies
Education and professional experience
A master’s degree in a relevant field and, in principle, three years of relevant professional experience are required for this post. Alternatively, candidates with a bachelor’s degree and an additional four years of relevant professional experience may be considered.
Additional requirements
Hands-on experience in hardware hacking, exploitation and security assessment across IT and embedded-system technologies, including but not limited to:
- side channel attacks; - voltage fault injection; - clock fault injection; - electromagnetic fault injection; - optical fault injection; - timing attacks; - simple, differential and correlation power analysis; - debug port attacks.
In-depth knowledge of:
- embedded system characterisation, hardware component imaging and probing techniques; - fault characterisation and fault model development; - boot loaders and their weaknesses; - trusted platform modules, trusted execution environments and other similar technologies, including attacks and mitigations.
Understanding of design principles for hardware analysis purposes, including:
- symmetric cryptographic algorithms; - asymmetric pre-quantum cryptographic algorithms; - asymmetric post-quantum cryptographic algorithms.
- applying relevant security and certification standards, including FIPS 140-3, Common Criteria, ENISA, ISO and ETSI, for testing and certification purposes; - embedded systems and their interfaces and protocols; - software programming.
Experience of firmware extraction and reversing techniques is desirable.
Application timeline
This vacancy was first listed on 27 October 2026, today.
The application deadline is 17 November 2026, 20 days from today. Late applications are not accepted, so submit through the official EU Careers portal well in advance.
Last verified against the EU Careers feed on 27 October 2026.
Where to learn more
For headcount, mission, and other open vacancies at ESA see the ESA institution page; for the cost of living, correction coefficient, and other postings in Redu see our Redu location page.
New to EU careers? Our beginner's guide walks through entry routes, EPSO competitions, and what to prepare. For application logistics see application tips and EPSO competitions.
Career trajectory
Language profile
Application cadence
Visit the official European Space Agency website
Source: This job listing was sourced from the officialEU Careers portal (EPSO). First published: .