Research

Firmware & FPGA Development Engineer - European Organization for Nuclear Research (Geneva)

Contract TypeOther

About this position

The summary below is published by European Organization for Nuclear Research on the official vacancy notice. Our own analysis — salary realism, comparable openings, career trajectory, language profile — follows further down the page.

- Full-time - Compensation: CHF 6,372 - CHF 7,004 - monthly

The SY-BI group in CERN's Accelerator Systems Department develops and operates the instruments used to observe particle beams and measure their key properties. These systems are essential to the reliable operation, optimisation, and future development of CERN's accelerator complex.

You will contribute to the development of next-generation beam-position monitoring systems for CERN's injector complex, including the pre-accelerators and Antimatter Decelerator. You will work on innovative high-speed data-acquisition platforms combining fast digitisers with advanced System-on-Chip (SoC) technologies.

This role offers a hands-on opportunity to work at the intersection of digital electronics, embedded systems, real-time signal processing, and accelerator physics. It is particularly suited to people with an interest in FPGA or HDL development, high-speed electronics, embedded software, digital signal processing, instrumentation, or experimental physics.

Your responsibilities:

- Develop, integrate and test FPGA gateware and embedded SoC firmware for a SoC device. - Implement data acquisition and data processing logic and…

Excerpt shown; read the full notice on the official page. The structured breakdown below covers the key facts.

Key responsibilities

According to the vacancy notice, the role centres on the following duties:

  • Develop, integrate and test FPGA gateware and embedded SoC firmware for a SoC device
  • Implement data acquisition and data processing logic and real-time digital signal-processing algorithms
  • Validate system performance in laboratory and accelerator environments
  • Perform data analysis in Python
  • Assist measurement campaigns in the accelerator complex
  • Collaborate with experienced engineers, physicists, and technicians from different teams across CERN

Are you eligible?

Check these requirements from the notice before investing time in an application:

  • Education: Master's degree in Electronic Engineering or related field, or PhD in Electronic Engineering or related field
  • Experience: 2 to 6 years of post-graduation professional experience with Master's degree, or no more than 3 years of post-graduation professional experience with PhD
  • Languages: English (spoken…), French (commitm…)
  • Key skills: Digital signal processing, FPGA and SoC, Software programming (Python, C++), Verilog and SystemVerilog, Digital electronics, Python
  • Eligibility: National of a CERN Member or Associate Member State. Never had a CERN fellow or graduate contract before.

Contract and working arrangements

Contract duration: 24 months, with a possible extension up to 36 months maximum.

Working arrangements: Fully Onsite.

Hiring unit: SY-BI group, Accelerator Systems Department.

Position details

Reference
SY-BI-BP-2026-154-GRAP
Last Verified
6 November 2026

Position overview

This is the official EU Careers listing for Firmware & FPGA Development Engineer at CERN based in Geneva (Other). The vacancy reference is SY-BI-BP-2026-154-GRAP. The role falls under the Research domain.

- Full-time - Compensation: CHF 6,372 - CHF 7,004 - monthly

The SY-BI group in CERN's Accelerator Systems Department develops and operates the instruments used to observe particle beams and measure their key properties. These systems are essential to the reliable operation, optimisation, and future development of CERN's accelerator complex.

You will contribute to the development of next-generation beam-position monitoring systems for CERN's injector complex, including the pre-accelerators and Antimatter Decelerator. You will work on innovative high-speed data-acquisition platforms combining fast digitisers with advanced System-on-Chip (SoC) technologies.

This role offers a hands-on opportunity to work at the intersection of digital electronics, embedded systems, real-time signal processing, and accelerator physics. It is particularly suited to people with an interest in FPGA or HDL development, high-speed electronics, embedded software, digital signal processing, instrumentation, or experimental physics.

Your responsibilities:

- Develop, integrate and test FPGA gateware and embedded SoC firmware for a SoC device. - Implement data acquisition and data processing logic and real-time digital signal-processing algorithms. - Validate system performance in laboratory and accelerator environments. - Perform data analysis in Python. - Assist measurement campaigns in the accelerator complex. - Collaborate with experienced engineers, physicists, and technicians from different teams across CERN.

Your profile:

- Experience in digital signal processing. - Demonstrated experience with FPGA and SoC. - Experience in Software programming (e.g. Python, C++). - Demonstrated experience with Xilinx Zynq UltraScale+ MPSoC and/or RFSoC would be an advantage.

Skills:

- Knowledge of Verilog and SystemVerilog. - Knowledge of digital electronics. - Knowledge of Python. - Spoken and written English, with a commitment to learn French.

Eligibility criteria:

- You are a national of a CERN Member or Associate Member State. - You have a professional background in Electronic Engineering (or a related field) and have either: - a Master's degree with 2 to 6 years of post-graduation professional experience; - or a PhD with no more than 3 years of post-graduation professional experience.

- You have never had a CERN fellow or graduate contract before.

Job closing date: 24.11.2026 at 23:59 CEST.

Contract duration: 24 months, with a possible extension up to 36 months maximum.

Working hours: 40 hours per week

Job flexibility: Fully Onsite

Target start date: 01-March-2027

Job reference: SY-BI-BP-2026-154-GRAP

Field of work: Electronics Engineering

Benchmark job: 200050 - Electronics Engineer

Global Benefits

- A monthly net stipend of either 6372 or 7004 Swiss Francs per month depending on your degree. - 30 days of paid leave per year plus 2 weeks annual closure. - Coverage by CERN’s comprehensive health insurance scheme (for yourself, your spouse and children), and membership of the CERN Pension Fund. - Family, child and infant monthly allowances depending on your individual circumstances. - A relocation package (installation grant and travel expenses) depending on your individual circumstances. - Possibility to extend your contract up to 36 months. - On-the-job and formal training including language classes.

Overview of CERN -Discover a world where the impossible is made possible!

At CERN, the European Organization for Nuclear Research, we are pushing the frontiers of science and technology. Our groundbreaking work brings together not only physicists but also a diverse range of professionals from engineering, technical, scientific, and administrative fields. Together, we foster an environment where innovation and collaboration thrive.

Every day, we face exciting new challenges and opportunities to contribute to cutting-edge research that shapes our understanding of the universe. We meet these challenges through the diverse perspectives within our teams, ensuring every contribution is valued and driving our shared sense of inclusion and purpose. Diversity is a core value of CERN since its foundation, and it remains central to our mission and continued success.

If you are ready to be part of a dynamic, inclusive community pushing the boundaries of knowledge, CERN is the place where your curiosity and skills can thrive. Be part of our mission to uncover what lies at the heart of the universe!TAKE PART!

More information about us, here:careers.cern

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Application timeline

This vacancy was first listed on 29 October 2026, 10 days ago.

No closing date is published in the source feed for this position. EU vacancies typically remain open for four to eight weeks; check the official vacancy notice for the cut-off date and time.

Last verified against the EU Careers feed on 6 November 2026 (2 days ago).

Where to learn more

For headcount, mission, and other open vacancies at CERN see the CERN institution page; for the cost of living, correction coefficient, and other postings in Geneva see our Geneva location page; for related vacancies in the Research field browse our Research domain page.

New to EU careers? Our beginner's guide walks through entry routes, EPSO competitions, and what to prepare. For application logistics see application tips and EPSO competitions.

Career trajectory

Career progression for this grade staff is governed by Articles 44 to 46 of the Staff Regulations (consolidated text on EUR-Lex) and Annex IB on the promotion procedure. Step increases are automatic every two years (Art. 44); grade promotion is competitive, based on the appraisal exercise (Art. 45) and the Career Development Review. For roles at CERN, progression to the next grade typically takes three to five years on merit, with two-yearly step increases in between. Article 46 governs the classification at recruitment, which sets the starting step within the grade (usually step 1 for external recruits without prior EU service, step 2 or 3 where relevant professional experience is recognised).
Mobility within the institutions is encouraged via the inter-institutional and intra-institutional vacancy publication system: temporary agents who pass the probation period and reservists from EPSO laureate lists can typically apply to internal vacancies after one year of service. Lateral moves between Directorates-General reset the seniority clock for promotion only if the new post carries a different grade.

Language profile

Beyond the formal language requirements stated in the vacancy notice, the day-to-day working languages at this employer are English and French in roughly equal measure, with German appearing in some technical files. Internal meetings and most policy drafting in Brussels run in English; French remains the preferred internal language in Luxembourg-based services and parts of DG TRADE.

Application cadence

CERN has not advertised another comparable role with the same grade and Research signature in the past twenty-four months. This opening has rarely been seen on the EU Careers feed and may be the first such posting in our two-year window. Applicants who pass the eligibility checks should not assume the same profile will reopen on a predictable cadence.

Source: This job listing was sourced from the officialEU Careers portal (EPSO). First published: .

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